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Ad5766 sdz doc#437

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ad5766_sdz_doc
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Ad5766 sdz doc#437
serban563 wants to merge 2 commits intomainfrom
ad5766_sdz_doc

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Type

  • Documentation
  • Bug fix
  • New feature
  • Continuous integration

Checklist

Signed-off-by: Serban Tiution <Serban.Tiution@analog.com>
@StancaPop StancaPop self-assigned this Apr 21, 2026
@StancaPop StancaPop self-requested a review April 21, 2026 10:51
@StancaPop StancaPop added the human This content was made by a human label Apr 21, 2026
Supported carriers
-------------------------------------------------------------------------------

The :adi:`EVAL-AD5766/67-SD2Z<EVAL-AD5766>`, is, by definition a "FPGA
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The :adi:`EVAL-AD5766/67-SD2Z<EVAL-AD5766>`, is, by definition a "FPGA
The :adi:`EVAL-AD5766/67-SD2Z <EVAL-AD5766>`, is, by definition a "FPGA

:header-rows: 1

- - FPGA board
- EVAL-AD5766/67-SD2Z
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Can you put the link for the eval board instead of plain text?

on the FMC connector of the ZedBoard (J1).
#. Connect a 3.3V Voltage Source to the J12 Connector of the Evaluation Board.
#. Connect an oscilloscope to the MUX_OUT Connector of the Evaluation Board.
#. Build the boot files and run the project. You can follow :external+no-OS:doc:`this guide <projects/dac/ad5766-sdz>`
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#. Build the boot files and run the project. You can follow :external+no-OS:doc:`this guide <projects/dac/ad5766-sdz>`
#. Build the boot files and run the project. You can follow
:external+no-OS:doc:`this guide <projects/dac/ad5766-sdz>`

Comment on lines +1 to +2
.. imported from: https://wiki.analog.com/resources/tools-software/uc-drivers/ad5766

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.. imported from: https://wiki.analog.com/resources/tools-software/uc-drivers/ad5766

===============================================================================

16-Channel, 16-Bit Voltage Output denseDAC

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Missing chip photo

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Cannot find chip image for ad5766, only found for ad5767.

Overview
-------------------------------------------------------------------------------

The :adi:`AD5766` /:adi:`AD5767` are 16-channel, 16-/12-bit, voltage output
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The :adi:`AD5766` /:adi:`AD5767` are 16-channel, 16-/12-bit, voltage output
The :adi:`AD5766`/:adi:`AD5767` are 16-channel, 16-/12-bit, voltage output

- 1.8 V logic compatibility
- Integrated DAC output buffers

Applications :
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Applications :
Applications:

Comment on lines +127 to +142
Building the HDL Project
~~~~~~~~~~~~~~~~~~~~~~~~

The design is built upon ADI's generic HDL reference design framework. ADI
does not distribute pre-built bitstream files, so the project must be built
from source. Clone the HDL repository and, with the correct tools installed,
navigate to the project directory and run ``make``:

.. code-block:: bash

cd hdl/projects/ad5766_sdz/zed
make

A comprehensive build guide is available in the
`HDL User Guide <https://analogdevicesinc.github.io/hdl/user_guide/introduction.html>`__.

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This is HDL related doc, doesn't belong here.

…6/5767 project

- Wrote the main index
- Wrote the prerequisites page
- Wrote the User Guide
- Wrote the quickstart index
- Wrote the quickstart for Zedboard
  - Zedboard quickstart is incomplete, does not have boot log.

Signed-off-by: Serban Tiution <Serban.Tiution@analog.com>
Comment on lines +8 to +9


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.. Describe in general, few words

On most carriers, the :adi:`EVAL-AD5766/67-SD2Z<EVAL-AD5766>` boards
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On most carriers, the :adi:`EVAL-AD5766/67-SD2Z<EVAL-AD5766>` boards
On most carriers, the :adi:`EVAL-AD5766/67-SD2Z <EVAL-AD5766>` boards

Comment on lines +52 to +53

.. Describe in general, few words
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.. Describe in general, few words

Comment on lines +67 to +68
..
Link the zynqmp.rst
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